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Paid episode

The full episode is only available to paid subscribers of Computer, Enhance!

Q&A #57 (2024-06-17)

Answers to questions from the last Q&A thread.
20

In each Q&A video, I answer questions from the comments on the previous Q&A video, which can be from any part of the course.

Questions addressed in this video:

  • [00:03] A follow-up on JIT and AOT compilation.

  • [09:50] “Do you think there is an argument that there should be a ‘branchless mode’ on modern cpus. meaning you say to the cpu ‘i cannot use an if statement, function, etc in this current block of code’. And then the cpu gives you the register file as one block of memory so you can use it as a kind of cache?”

  • [27:45] “I hope this is a trivial question, but I've been wondering how to tell pointer sizes. As a C novice, I'm just aware that size_t or uintptr_t is meant to reflect the size of pointers. But what actually determines it? Is it the hardware and/or OS? Beside backwards compatibility like the 'bits 16' setting we used in part 1, can compilers or applications influence it? But most importantly, is it safe to assume that all 32-bit CPUs use 32-bit pointers and 64-bit CPUs use 64-bit pointers?”

  • [45:10] Follow-up to the semi-L1 speeds after ~5 minutes (Kaby Lake, Win10)

The full video is for paid subscribers

Programming Courses
A series of courses on programming topics.