In each Q&A video, I answer questions from the comments on the previous Q&A video, which can be from any part of the course.
For those wondering what the name of the audio API was that made me go “I can’t believe I am forgetting the acronym” in the middle of this video, it was ASIO.
The questions addressed in this video are:
[00:02] “The D language actually has this because of Uniform Function Call Syntax. You could have a struct like … and have the rest of the code be none the wiser (even code like foo.x = 7). I think C# has stuff like this too. Is this what you’d be hoping for? If so, I’m surprised - I’d have guessed you usually don’t prefer implicit magic like this happening on things that don’t look like function calls.”
[04:37] “Could someone remind me what the ‘warm’ criteria was?”
[06:00] “I have a question about managing intrusive thoughts while writing code. When thoughts come up about edge cases, performance, reliability, or decisions that may need to be revisited later, how do you decide whether to address them immediately or set them aside? I’m finding it difficult to iterate quickly because I often get pulled into these concerns before I’ve built a working v0. I’ve tried writing TODOs in the code and keeping separate notes, but neither approach has worked well for me.”
[15:47] “I now have a question about wasapi (I believe you now use wasapi but if I’m wrong then you can ignore this question). I’m writing the sound system for my codebase and had my wav parser ready, mixer chugging along, sat back to enjoy a song but then found out that changing the system volume causes these pops.... I know that changing the volume of a sound wave causes the discontinuity which manifests itself as audio popping but in this case where it’s not an internal volume I have control over I don’t know how to fix these. It seems to me as if windows just immediately applied the new volume and my futile attempt of trying to bypass windows’ volume logic didn’t work since they seem to first clamp my samples and then multiply by the volume... I tried some wasapi gist examples and they all had this same issue. Have you had this problem and fixed it in your own code and could you share your knowledge if you have?”
[25:07] “I formed my question about heaps slightly misleading. It wasn’t about a memory heap, but a data structure, like in the heap sort. In the video together with Primeagen regarding code interviews you commented that heaps are quite slow. So I was wondering, what should you use instead, when the need arises?”
[33:27] “I’m working on a project that uses a cortex-m7, a fairly fast 32-bit embedded core. It has some fancy pipeline features of big boy desktop chips, like a branch predictor, and the ability to dual issue many instructions, but doesn’t have a RAT (it’s not “out-of-order” at least as far as I know). Do I understand correctly that in CPUs without a RAT, any two adjacent instructions that use the same register are effectively serially dependent? Is this how it used to work in the desktop world back in the day?”
[40:53] “This question relates to Part 5: Dependency Chain Stalls and In-order Interleaving. From these results, I would expect 12-way interleaving to maintain peak throughput regardless of chain length (4 FMAs/cycle * 3 cycles = 12 FMAs in flight needed to cover the latency). However, that’s not what I observe. With 12-way interleaving, throughput decreases from ~3.6 to ~3.0 FMAs/cycle as the chain length grows. I need a minimum of 16-way interleaving for throughput to stay flat at ~3.8 FMAs/cycle. My conclusion is that the CPU can’t sustain the 3-cycle latency when the FMA execution ports are saturated, resulting in an effective latency of 4 cycles under load. This would explain why I need 4 * 4 = 16 chains to obtain a flat throughput curve. I think you’ve hinted at this in some of your videos. Would you kindly explain why this happens? Thanks!”
