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Does x86 Need to Die?
A recent article claimed that "x86 needs to die". Does it? I was on ThePrimeagen's live stream last week to talk about it.
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Casey Muratori
7
Cache Sets and Indexing
Because hardware caches must operate under strict time and space constraints, they can exhibit pathological behavior when the addresses they cache fall…
30:34
2
Q&A #50 (2024-04-08)
Answers to questions from the last Q&A thread.
37:47
16
Q&A #49 (2024-04-02)
Answers to questions from the last Q&A thread.
47:08
19

March 2024

The Apple M-Series GoFetch Attack
An excellent new security analysis of vulnerabilities in M1 and M2 silicon sheds new light on how the "DMP" works on Apple's M1, M2, and M3 chips.
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Casey Muratori
14
Q&A #48 (2024-03-25)
Answers to questions from the last Q&A thread.
19:06
18
Unaligned Load Penalties
Watch now (27 mins) | Modern CPUs are much more efficient at unaligned loads than they used to be, but it is still possible to hit cases where penalties…
27:25
2
Q&A #47 (2024-03-18)
Answers to questions from the last Q&A thread.
59:50
16
Latency and Throughput, Again
Latency and throughput are critical to understand, and it can be confusing how they apply to caches vs. execution units - but the core principles are…
37:55
3
Q&A #46 (2024-03-11)
Answers to questions from the last Q&A thread.
34:05
14
Non-Power-of-Two Cache Size Testing
What approach should we take when trying to test working memory sizes that are not a power-of-two?
35:15
11
Q&A #45 (2024-03-04)
Answers to questions from the last Q&A thread.
45:44
11
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